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September 30, 2022
Nippon Telegraph and Telephone Corporation
Japan Science and Technology Agency (JST)
Nippon Telegraph and Telephone Corporation (Chiyoda-ku, Tokyo; President: Akira Shimada), Kyushu University (Fukuoka-shi, Fukuoka; President: Tatsuro Ishibashi), and the University of Tokyo (Bunkyo-ku, Tokyo; President: Teruo Fujii) have developed the world's first quantum computer architecture that significantly reduces the effect of burst errors, which is known to be one of the most urgent problems in the scalability of quantum computers, by changing the error-correction strategies adaptively to the error properties of quantum computers.
Quantum computers are expected to be capable of efficiently solving scientifically important problems, such as prime factoring and quantum chemistry. Thus, many groups are working on developing large and reliable quantum computers. The main challenge in the development is the reduction of high error rates in quantum computers. An element of quantum computers is called a qubit, which can be a superposition of binary states. Once we observe the state of qubits, the superposition states are probabilistically collapsed to either zero or one. This means that unexpected leakage of the information from the qubits to an environment is treated as an error, and thus qubits are fragile to environmental noise compared to classical ones.
One of the most promising methods for achieving reliable quantum computation is quantum error correction (QEC). In typical QEC schemes, several noisy physical qubits are encoded to form a fewer number of logical qubits. During the computation, we repeatedly check the error parities, called syndrome values. By estimating what errors occur on the qubits from the syndrome values with classical computers, we can efficiently track and eliminate the effect of errors on quantum computers. Surface codes are the most promising quantum error-correcting codes since they can be implemented with qubits integrated on two-dimensional grids, and error-estimation problems can be converted to efficiently solvable graph-matching problems with small approximations (Fig. 1). Therefore, surface codes are considered promising in a variety of quantum devices, such as superconducting circuits, trapped ions, quantum dots, neutral atoms, and photons.
(Figure 1) Schematic picture of quantum error correction
Recent technological progress enables the integration of a large number of qubits, and logical-error reduction is experimentally demonstrated in superconducting circuits. However, these experiments also reveal that temporal error-property changes are inevitable and degrade the performance of QEC schemes (Fig. 2). For example, in the case of superconducting qubits, cosmic rays hit the substrate of quantum chips with a small probability and incur a burst error on multiple qubits. While similar effects are known in the classical memory cells as soft errors, their quantum counterpart affects a vast region and lasts longer since qubits are fragile to environmental noise. Massive efforts have been paid to make superconducting qubits insensitive to cosmic rays, e.g., shielding qubits. However, these technologies impose other difficulties in qubits designs and damage the future scalability of quantum computers.
(Figure 2) Mechanism of error increase by burst-errors strikes
Burst errors by cosmic rays are expected to occur at non-negligible levels in other devices, such as quantum dots and Majorana fermions. Trapped ions, neutral atoms, and photonic quantum computing may also suffer from errors that occur with low probability but have catastrophic effects. Thus, it will be necessary to design quantum computer architecture that is tolerant of burst errors.
Our group proposed a quantum computer architecture that can significantly mitigate the effect of burst errors. In our proposal, we showed that the duration and size of burst errors can be reduced only by adding several logic units to classical controllers of quantum computers and without changing the qubit design. While we evaluated our methods for burst errors by cosmic-ray strikes since their properties are experimentally known, our methods can be applied to any burst error as far as it satisfies several natural conditions. Thus, our results resolve one of the most serious problems, burst errors on quantum computers, solely with architecture-level improvements and contribute to the future scalability of quantum computers.
In this paper, NTT is responsible for the proposal of mechanism and algorithms of burst-error-aware error estimation, Kyushu University for designing architecture and circuit implementation/evaluation, and the University of Tokyo for statistics on anomaly detection and investigation of the physical background of cosmic ray effects.
The key of our proposal is three technologies; anomaly detection, dynamic code deformation, and re-execution of error estimation. In our proposal, we detect the occurrence of burst errors with small latency using anomaly detection techniques. As mentioned in the background, qubits are damaged by direct measurements, and it is prohibited to directly monitor the error properties via direct measurements. Instead, we proposed a technique to non-destructively monitor the error properties of qubits from the statistics of syndrome values.
Once the occurrence of burst errors is detected by anomaly detection, two processes are launched to mitigate the burst-error effects. The first one is dynamic changes in the encoding scheme. After detecting burst errors, we switch the error-correcting codes to ones that are less efficient but more tolerant of burst errors. In this study, we proposed a design to insert these processes with a small overhead. Another procedure is the re-execution of error estimation. By rolling back the state of logic units for error estimation and re-executing the error estimation by taking the information of burst errors into account, we can perform more accurate error estimation. This technique can reduce the effect of burst errors during the latency of anomaly detection. Figure 3 illustrates the behavior of these detection and mitigation schemes.
(Figure 3) Our proposal: Detection of burst errors and reaction to them
These additional control units may sacrifice the processing speed of quantum computers. Thus, we quantitatively evaluated the performance degradation of critical parts with numerical simulations and circuit synthesis. In conclusion, we have shown that the proposed modification imposes small overheads on systems.
In this study, we addressed one of the challenges in expanding the scale of future quantum computer calculations, i.e., burst errors on multiple qubits, with an architecture-level improvement, and showed that it is possible to improve the scalability of quantum computers without any extra load on the quantum devices. We consider the following two topics as future directions.
(1) Consider the applicability of our proposal to other quantum devices
While we focused on the properties of burst errors by cosmic rays, we can consider another quantum computer architecture that is tolerant to burst errors and tailored for other promising quantum devices.
(2) Design more detailed quantum computing systems
A large-scale quantum computing system requires an advanced architectural design that meets the technological limits of power consumption and wiring complexity. This is especially vital for devices such as superconducting qubits since they are designed to operate at cryogenic temperatures. We proposed several critical components satisfying these constraints [1, 2]. We will continue to refine the designs and establish an architecture for highly efficient quantum computation.
These results are achieved with the deep collaboration of various fields, including code theory, statistics, graph algorithms, cosmic-ray physics, and computer architecture. Such collaboration contributes to making the image of quantum computers more concrete and improves them under quantitative consideration. Based on the knowledge of computer science and physics and the foundation of software, we continue to work on establishing the standard of future quantum computer architecture.
This work was supported by JST PRESTO Grant Number JPMJPR1916 and JPMJPR2015, JST Moonshot R&D Grant Number JPMJMS2061 and JPMJMS2067, JST ERATO Grant Number JPMJER1601, MEXT Q-LEAP Grant Number JPMXS0118068682, and JSPS KAKENHI Grant Number JP22H05000 and JP22K17868.
It has recently been recognized that errors caused by cosmic-ray strikes occur with non-negligible frequency and this will become one of the difficulties in the development of scalable quantum computing. This work addresses this issue by combining the fields of computer architecture and physics. Also, this is the result achieved through cross-disciplinary collaboration among researchers with various backgrounds participating in the moonshot project, and is a vital development toward the realization of a large-scale fault-tolerant quantum computer.
The team's results were published at the 56th IEEE/ACM International Symposium on Microarchitecture (MICRO-55) to be held from October 1, 2022.
Title: "Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays"
Authors: Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto
 Press release "Development of Quantum Error Correction Method for Superconducting Quantum Computers in Cryogenic Environments - World's First Realization of a Key Technology for the Development of Large-Scale Quantum Computers -" (November 8, 2021)
 Press release "World's First Quantum Error Correction Method Developed for Cryogenic Environments Enabling Operations between Logic Qubits - A Major Step Toward the Realization of Large-Scale Quantum Computers -" (April 1, 2022)
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